[PATCH i386 AVX512] [64/n] Add rest of VI1-AVX2: vpack[us]wb.

[Kirill Yukhin]

Hello,
This patch adds rest of vpack instruction patterns.

Bootstrapped.
gcc.target/i386.exp tests on top of patch-set show no regressions.
under simulator.

Is it ok for trunk?

gcc/
* config/i386/sse.md
(define_insn "<sse2_avx2>_packsswb<mask_name>"): Add masking.
(define_insn "<sse2_avx2>_packuswb<mask_name>"): Ditto.

--
Thanks, K

diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index d3e9635..594e692 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -11007,21 +11007,21 @@
DONE;
})

-(define_insn "<sse2_avx2>_packsswb"
- [(set (match_operand:VI1_AVX2 0 "register_operand" "=x,x")
+(define_insn "<sse2_avx2>_packsswb<mask_name>"
+ [(set (match_operand:VI1_AVX2 0 "register_operand" "=x,v")
(vec_concat:VI1_AVX2
(ss_truncate:<ssehalfvecmode>
- (match_operand:<sseunpackmode> 1 "register_operand" "0,x"))
+ (match_operand:<sseunpackmode> 1 "register_operand" "0,v"))
(ss_truncate:<ssehalfvecmode>
- (match_operand:<sseunpackmode> 2 "nonimmediate_operand" "xm,xm"))))]
- "TARGET_SSE2"
+ (match_operand:<sseunpackmode> 2 "nonimmediate_operand" "xm,vm"))))]
+ "TARGET_SSE2 && <mask_mode512bit_condition> && <mask_avx512bw_condition>"
"@
packsswb\t{%2, %0|%0, %2}
- vpacksswb\t{%2, %1, %0|%0, %1, %2}"
+ vpacksswb\t{%2, %1, %0<mask_operand3>|%0<mask_operand3>, %1, %2}"
[(set_attr "isa" "noavx,avx")
(set_attr "type" "sselog")
(set_attr "prefix_data16" "1,*")
- (set_attr "prefix" "orig,vex")
+ (set_attr "prefix" "orig,maybe_evex")
(set_attr "mode" "<sseinsnmode>")])

(define_insn "<sse2_avx2>_packssdw"
@@ -11041,17 +11041,17 @@
(set_attr "prefix" "orig,vex")
(set_attr "mode" "<sseinsnmode>")])

-(define_insn "<sse2_avx2>_packuswb"
- [(set (match_operand:VI1_AVX2 0 "register_operand" "=x,x")
+(define_insn "<sse2_avx2>_packuswb<mask_name>"
+ [(set (match_operand:VI1_AVX2 0 "register_operand" "=x,v")
(vec_concat:VI1_AVX2
(us_truncate:<ssehalfvecmode>
- (match_operand:<sseunpackmode> 1 "register_operand" "0,x"))
+ (match_operand:<sseunpackmode> 1 "register_operand" "0,v"))
(us_truncate:<ssehalfvecmode>
- (match_operand:<sseunpackmode> 2 "nonimmediate_operand" "xm,xm"))))]
- "TARGET_SSE2"
+ (match_operand:<sseunpackmode> 2 "nonimmediate_operand" "xm,vm"))))]
+ "TARGET_SSE2 && <mask_mode512bit_condition> && <mask_avx512bw_condition>"
"@
packuswb\t{%2, %0|%0, %2}
- vpackuswb\t{%2, %1, %0|%0, %1, %2}"
+ vpackuswb\t{%2, %1, %0<mask_operand3>|%0<mask_operand3>, %1, %2}"
[(set_attr "isa" "noavx,avx")
(set_attr "type" "sselog")
(set_attr "prefix_data16" "1,*")

[Uros Bizjak]

Post by Kirill Yukhin
Hello,
This patch adds rest of vpack instruction patterns.
Bootstrapped.
gcc.target/i386.exp tests on top of patch-set show no regressions.
under simulator.
Is it ok for trunk?
gcc/
* config/i386/sse.md
(define_insn "<sse2_avx2>_packsswb<mask_name>"): Add masking.
(define_insn "<sse2_avx2>_packuswb<mask_name>"): Ditto.

OK.

Thanks,
Uros.